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Showing posts from April, 2024

Memory power reduction

 *  Memory retention voltage depends on PVT   * Leakage during memory state retention ( Data retention during standby)  * As retention time increases more errors    Solutions:  1. Voltage scaling ( as VDD reduces number of errors increases , Leakage current )  2. Error correction codes  Effect of ECC:  1. max 1 error per line can be corrected, 2 errors can be detected  2. Area: Memory size increase by (n-k)/n    small additional area for encoder and decoder units ( Fully combinational blocks)  3. Latency : Encoding latency added to write access                      Decoding latency added to read access  For SEC/SED  Number of data bits    No of check bits 8-11                                  5 12-26                 ...